Use Of I/O Delays

In most cases, the main CPU in a system will be significantly faster than the UART. Because of the timing characteristics of the UART (this applies to many other peripheral chips as well), some settling time is required between successive accesses to the chip's registers. On 80386 and earlier CPUs, executing a minimum of two CPU instructions between successive accesses to the UART seems to be sufficient (the 80486 may require additional instructions due to the way it pipelines instructions and does some of the execution in parallel). Where possible, I have interspersed other instructions between UART accesses to provide this delay. Where this was not possible, I have utilized an IO_DELAY macro. This macro takes a count parameter and executes a loop count number of times. During each loop, the count is anded with a dummy variable. This is done to inhibit the compilers loop optimization (which would otherwise recognize the loop as doing nothing and optimize it out completely!).